DocumentCode :
2216132
Title :
Optical network reconfiguration for signal processing applications
Author :
Chamberlain, Roger ; Franklin, Mark ; Krishnamurthy, Praveen
Author_Institution :
Comput. & Commun. Res. Center, Washington Univ., St. Louis, MO, USA
fYear :
2002
fDate :
2002
Firstpage :
344
Lastpage :
355
Abstract :
This paper considers a class of embedded signal processing applications. To achieve real-time performance these applications must be executed on a parallel processor. The paper focuses on the multiring optical interconnection network used in the system and specifically on the performance gains associated with utilizing the bandwidth reconfiguration capabilities associated with the network. The network is capable of being reconfigured to provide designated bandwidths to different source-destination connections both across rings and within a ring. The applications each consist of a sequence of alternating communication and computation phases. The sequence continues until execution of the application is complete. The effect of reconfiguration on application performance is explored using simulation techniques. The results indicate that substantial performance gains (speedups of 2 or more) can be achieved for this application class.
Keywords :
VLSI; digital signal processing chips; embedded systems; multiprocessing systems; optical interconnections; parallel processing; VLSI; bandwidth reconfiguration capabilities; computation phases; embedded signal processing applications; multiring optical interconnection network; optical network reconfiguration; parallel processor; real-time performance; simulation techniques; source-destination connections; Application software; Bandwidth; Embedded computing; Multiprocessor interconnection networks; Optical arrays; Optical fiber networks; Optical interconnections; Optical signal processing; Vertical cavity surface emitting lasers; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architectures and Processors, 2002. Proceedings. The IEEE International Conference on
ISSN :
2160-0511
Print_ISBN :
0-7695-1712-9
Type :
conf
DOI :
10.1109/ASAP.2002.1030733
Filename :
1030733
Link To Document :
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