DocumentCode :
2216797
Title :
Communication architecture tuners: a methodology for the design of high-performance communication architectures for system-on-chips
Author :
Lahiri, Kanishka ; Raghunathan, Anand ; Lakshminarayana, Ganesh ; Dey, Sujit
Author_Institution :
University of California
fYear :
2000
fDate :
2000
Firstpage :
513
Lastpage :
518
Keywords :
Algorithm design and analysis; Computer architecture; Design methodology; Measurement; National electric code; Permission; Protocols; Switches; System-on-a-chip; Tuners;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
Type :
conf
DOI :
10.1109/DAC.2000.855364
Filename :
855364
Link To Document :
بازگشت