Title :
An embedded 14-bit 800MS/s DAC for direct digital frequency synthesizer in 0.18-μm CMOS
Author :
Wan, Shuqin ; Chen, Zhenhai ; Yu, Zongguang ; Huang, Songren ; Ji, Huicai
Author_Institution :
Dept. of Inf. Technol., Southern Yangtze Univ., Wuxi, China
Abstract :
An embedded 14-bit 1-GS/s digital-to-analog converter for direct digital frequency synthesizer (DDFS) application is presented. The DAC is implemented using a segmented current-steering architecture, with the top 6 bits and the remaining 8 bits. The output stage of dual return-to-zero scheme is used to enhance the dynamic performance of spurious-free dynamic range (SFDR). The DAC core is fabricated in a 1P6M 0.18 mum standard CMOS technology occupies a die area of only 1.6 times 1.5 mm2. The measured differential nonlinearity lies between -0.8 LSB and 0.3LSB, integral nonlinearity lies between -1.5LSB and 1LSB. And the SFDR is 76.47 dB for 80 MHz output at 0.8 GHz sampling clock rate.
Keywords :
CMOS integrated circuits; digital-analogue conversion; direct digital synthesis; CMOS; DAC; direct digital frequency synthesizer; frequency 0.8 GHz; frequency 80 MHz; segmented current-steering architecture; size 0.18 mum; spurious-free dynamic range; word length 14 bit; CMOS process; CMOS technology; Clocks; Decoding; Digital-analog conversion; Dynamic range; Frequency conversion; Frequency synthesizers; Linearity; Superconductivity; Current steering; DAC; DDFS; Dual return-to-zero;
Conference_Titel :
Applied Superconductivity and Electromagnetic Devices, 2009. ASEMD 2009. International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-3686-6
Electronic_ISBN :
978-1-4244-3687-3
DOI :
10.1109/ASEMD.2009.5306681
