• DocumentCode
    2216921
  • Title

    Efficient building block based RTL code generation from synchronous data f-low graphs

  • Author

    Horstmannshoff, Jens ; Meyr, Heinrich

  • Author_Institution
    Integrated Signal Processing Systems
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    552
  • Lastpage
    555
  • Keywords
    Algorithm design and analysis; Application specific integrated circuits; Buildings; Flow graphs; Hardware design languages; Permission; Signal generators; Signal processing; Signal processing algorithms; Synchronous generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings 2000
  • Print_ISBN
    1-58113-187-9
  • Type

    conf

  • DOI
    10.1109/DAC.2000.855372
  • Filename
    855372