DocumentCode :
2216958
Title :
Design and implementation of a high speed CMOS imaging system
Author :
Guo, Wen-baa ; He, Xin ; Wei, Zhong-hui ; Qi, Chao
Volume :
3
fYear :
2010
fDate :
20-22 Aug. 2010
Abstract :
In order to meet the needs of measurement of high-speed target, the timing sequence of LUPA300, an array CMOS image sensor of CYPRESS, is analyzed. The driving timing and control software is designed for the array CMOS sensor. High speed CMOS imaging system, whose hardware platform is FPGA, is emphasized. Real-time non-uniformity correction for CMOS sensor is implemented in the output stage. The experimental result shows that the system could control the CMOS sensor flexibly. The image is clear and stable. The maximum resolution of the image is 640H×480V pixels and the system can operate up to 250 frames per second in full resolution.
Keywords :
CMOS image sensors; field programmable gate arrays; image resolution; integrated circuit design; timing; CMOS image sensor; CYPRESS; FPGA; LUPA300; control software; driving timing sequence; high speed CMOS imaging system; Arrays; CMOS integrated circuits; Computational modeling; Computers; Real time systems; Semiconductor device modeling; CMOS image sensor; FPGA; High speed; non-uniformity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Computer Theory and Engineering (ICACTE), 2010 3rd International Conference on
Conference_Location :
Chengdu
ISSN :
2154-7491
Print_ISBN :
978-1-4244-6539-2
Type :
conf
DOI :
10.1109/ICACTE.2010.5579081
Filename :
5579081
Link To Document :
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