DocumentCode :
2216993
Title :
An architecture-driven metric for simultaneous placement and global routing for FPGAs
Author :
Chang, Yao-Wen ; Chang, Yu-Tsang
Author_Institution :
National Chiao Tung University
fYear :
2000
fDate :
2000
Firstpage :
567
Lastpage :
572
Keywords :
Costs; Delay; Density measurement; Field programmable gate arrays; Logic arrays; Permission; Pins; Routing; Switches; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
Type :
conf
DOI :
10.1109/DAC.2000.855375
Filename :
855375
Link To Document :
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