Driver amplifier design considerations for high efficiency envelope tracking power amplifier line-up

Author

Wang, Zhancang ; Ma, Rui ; Yang, Xiaokun ; Lanfranco, Sandro

Author_Institution

CTO Res., Nokia Siemens Networks, Beijing, China

fYear

2012

fDate

15-17 April 2012

Firstpage

1

Lastpage

8

Abstract

In this paper, comprehensive design considerations and conclusion for multi-stage envelope tracking power amplifier line-up was presented. Key aspects such as supply modulator, crest factor reduction algorithm and transistor technology with envelope tracking driver characterization were studied. Also, a test method was implemented to prove how envelope tracking trade off efficiency and linearity on various types of driver amplifiers.

Keywords

driver circuits; power amplifiers; crest factor reduction algorithm; driver amplifier design; envelope tracking driver characterization; high efficiency envelope tracking power amplifier line-up; multistage envelope tracking power amplifier line-up; supply modulator; test method; transistor technology; Gain; Gallium arsenide; Modulation; Power amplifiers; Radio frequency; Trajectory; Transistors; Crest factor reduction; GaAs; GaN; efficiency; envelope tracking; line-up; power amplifier; supply modulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless and Microwave Technology Conference (WAMICON), 2012 IEEE 13th Annual

Conference_Location

Cocoa Beach, FL

Print_ISBN

978-1-4673-0129-9

Electronic_ISBN

978-1-4673-0128-2

Type

conf

DOI

10.1109/WAMICON.2012.6208437

Filename

6208437