DocumentCode :
2217227
Title :
30 nm device channel profile optimization for digital application by using numerical simulation
Author :
Li, Gongchuan ; Wang, Wenli ; Qi, Liyun ; Joardar, Kuntal
Volume :
2
fYear :
2001
fDate :
22-25 Oct. 2001
Firstpage :
879
Abstract :
Bulk and novel MOSFET structures with gatelengths in 30 nm regime are expected to become industry standards in approximately 2007. In this article we discuss the application of TCAD to the study of analytical (idealized) MOSFET structures in this regime. The electrical properties of 30 nm planar NMOSFET with super halo structure were described with the help of semi-classical transport simulation. in ISE-DESSIS. The device was optimized through an advanced process and device synthesis system, the 3.13e -4 A/μm saturation current and 8.0e -11 A/μm leakage current at supply voltage Vd = 0.6 V were obtained for low power and high performance application.
Keywords :
MOSFET; leakage currents; semiconductor device models; technology CAD (electronics); 30 nm; MOSFET; TCAD; leakage current; planar NMOSFET; saturation current; semi-classical transport simulation; super halo structure; Circuit simulation; Circuit synthesis; Computer aided manufacturing; Current supplies; Doping; Leakage current; MOSFET circuits; Numerical simulation; Semiconductor process modeling; Space technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Print_ISBN :
0-7803-6520-8
Type :
conf
DOI :
10.1109/ICSICT.2001.982035
Filename :
982035
Link To Document :
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