Title :
Convex delay models for tyansistor sizing
Author :
Ketkar, Mahesh ; Kasamsetty, Kishore ; Sapatnekar, Sachin
Author_Institution :
University of Minnesota
Keywords :
Circuit testing; Context modeling; Contracts; Delay; Inverters; Modems; Optimization methods; Permission; SPICE; Timing;
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
DOI :
10.1109/DAC.2000.855395
