DocumentCode :
2217613
Title :
Characterization of Pd-nanocrystal-based nonvolatile memory devices
Author :
Seol, Kwang Soo ; Choi, Seong Jae ; Choi, Jae-Young ; Jang, Eun-Joo ; Kim, Byung-Ki ; Park, Sang-Jin ; Cha, Dea-Gil ; Jun, Shinae ; Park, Jong-Bong ; Park, Yoondong ; Choi, Suk-Ho
Author_Institution :
Samsung Adv. Inst. of Technol., Suwon
Volume :
1
fYear :
2006
fDate :
22-25 Oct. 2006
Firstpage :
704
Lastpage :
705
Abstract :
Charge loss rate of Pd-nanocrystal (NC)-based nonvolatile memories is reduced about 60% by employing an asymmetric tunnel barrier composed of stacked SiO2 and HfO2 layers or insulating ZrO2 NCs between Pd NCs.
Keywords :
MOS memory circuits; hafnium compounds; nanoelectronics; nanostructured materials; palladium; platinum; silicon compounds; tunnelling; zirconium compounds; Pd-SiO2-HfO2-Pd; Pd-SiO2-HfO2-Pd - Interface; Pd-ZrO2-Pd; Pd-ZrO2-Pd - Interface; asymmetric tunnel barrier; charge loss rate; nonvolatile memory devices; stacked layers; Capacitors; Electrodes; Hafnium oxide; Insulation; Nanocrystals; Nonvolatile memory; Physics; Scanning electron microscopy; US Department of Transportation; Voltage; Pd nanocrystal; ZrO2 nanocrystal; asymmetric tunnel barrier; nonvoltile memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology Materials and Devices Conference, 2006. NMDC 2006. IEEE
Conference_Location :
Gyeongju
Print_ISBN :
978-1-4244-0541-1
Electronic_ISBN :
978-1-4244-0541-1
Type :
conf
DOI :
10.1109/NMDC.2006.4388970
Filename :
4388970
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2217613
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