DocumentCode
2217677
Title
A study on gate-induced junction breakdown
Author
Lim, K.Y. ; Yu, X. ; Yeo, D.
Author_Institution
Chartered Semicond. Manuf. Ltd., Singapore, Singapore
Volume
2
fYear
2001
fDate
22-25 Oct. 2001
Firstpage
950
Abstract
Drain junction breakdown in PMOSFETs can be due to any of the following leakages: 1.) subthreshold current; 2.) sub-surface punchthrough current; 3.) gate-induced drain leakage; or 4.) sub-surface band to band tunneling (diode leakage current). In this paper, the mechanism of gate-induced junction breakdown was experimentally characterized and studied. It can be explained through the theory of Gate-Induced Drain Leakage (GIDL) or surface band to band tunneling (BTBT). It was shown that gate-induced drain leakage has a direct correlation with the gate field applied and exhibits similar trend to the gate tunneling current. The magnitude of this leakage is affected by the electric field under the overlap region between gate and lightly-doped drain (LDD) structure as well as the amount of inversion charge at that region. Therefore, by optimizing the PLDD implant energy and dose, this gate-induced drain leakage can be minimized.
Keywords
MOSFET; ion implantation; leakage currents; semiconductor device breakdown; semiconductor device reliability; tunnelling; GIDL; PLDD implant dose; PLDD implant energy; PMOSFETs; electric field; gate-induced drain leakage; gate-induced junction breakdown; inversion charge; lightly-doped drain structure; overlap region; surface band to band tunneling; Annealing; CMOS technology; Current measurement; Electric breakdown; Leakage current; MOSFET circuits; Semiconductor device breakdown; Substrates; Subthreshold current; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Print_ISBN
0-7803-6520-8
Type
conf
DOI
10.1109/ICSICT.2001.982052
Filename
982052
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