Title :
Design of a 24 GHz ultra low power current reused CMOS LNA in subthreshold region
Author :
Yasami, Saeid ; Bayoumi, Magdy
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA
Abstract :
This paper presents a single-stage ultra-low power low voltage low noise amplifier (LNA) at 24 GHz in commercially available CMOS technology in 90 nm. The LNA has been implemented by using current reused technique with operation biased in subthreshold region to reduce power consumption. The state of art LNA in this work achieves 10 dB power gain (S21), 1.2 dB noise figure (NF), and input-referred third-order intercept point (IIP3) of 12 dB. It consumes significantly low power of only 160 uW from very low voltage power supply of 0.55 V and DC current of 287 uA at 24 GHz.
Keywords :
CMOS integrated circuits; integrated circuit design; low noise amplifiers; low-power electronics; DC current; current 287 muA; current reused technique; frequency 24 GHz; input-referred third-order intercept point; noise figure 1.2 dB; power 160 muW; power consumption reduction; subthreshold region; ultra low power CMOS LNA; voltage 0.55 V; CMOS integrated circuits; CMOS technology; Gain; Low-noise amplifiers; Power demand; Radio frequency; Transistors; 24GHz; CMOS Low noise amplifier; Current resued technioque; Ultra-low power;
Conference_Titel :
Wireless and Microwave Technology Conference (WAMICON), 2012 IEEE 13th Annual
Conference_Location :
Cocoa Beach, FL
Print_ISBN :
978-1-4673-0129-9
Electronic_ISBN :
978-1-4673-0128-2
DOI :
10.1109/WAMICON.2012.6208459
