Title :
A switch level fault simulation environment
Author :
Krishnaswamy, V. ; Casas, J. ; Tetzlaff, T.
Author_Institution :
Intel Corporation
Keywords :
Algorithm design and analysis; Bridge circuits; Circuit faults; Circuit simulation; Databases; Delay; Logic devices; Switches; Switching circuits; Timing;
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
DOI :
10.1109/DAC.2000.855419
