DocumentCode :
2217900
Title :
Universal fault simulation using fault tuples
Author :
Dwarakanath, Kumar N. ; Blanton, R.D.
Author_Institution :
Carnegie Mellon University
fYear :
2000
fDate :
2000
Firstpage :
786
Lastpage :
789
Keywords :
Automatic test pattern generation; Clocks; Error correction; Fault detection; Performance evaluation; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
Type :
conf
DOI :
10.1109/DAC.2000.855420
Filename :
855420
Link To Document :
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