DocumentCode
2217903
Title
CML III bipolar standard cell library
Author
Tufte, Brian
Author_Institution
Honeywell Inc., Plymouth, MN, USA
fYear
1988
fDate
12-13 Sep 1988
Firstpage
180
Lastpage
182
Abstract
A 1.25 μm current mode logic (CML) bipolar standard cell library with subnanosecond loaded gate delays is discussed. Unique computer-aided design CAD tools that produce accurate models of the library cells and optimize designs for area, speed, and power are also discussed. The interplay between the library and the tools can produce higher speed, lower power chips, at less cost
Keywords
bipolar integrated circuits; cellular arrays; emitter-coupled logic; integrated logic circuits; logic CAD; 1.25 micron; CAD tools; bipolar standard cell library; current mode logic; models; subnanosecond loaded gate delays; Circuit testing; Costs; Design automation; Design optimization; Macrocell networks; Microcell networks; Power system modeling; Software libraries; Timing; Very high speed integrated circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1988., Proceedings of the 1988
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/BIPOL.1988.51073
Filename
51073
Link To Document