DocumentCode :
2218525
Title :
Novel architecture and programming support for high-speed, low power, and flexible next generation communication ICs
Author :
Weiss, Matthias ; Castrillon, Jeronimo ; Leupers, Rainer
Author_Institution :
Intel Mobile Commun., Dresden, Germany
fYear :
2011
fDate :
27-28 Sept. 2011
Firstpage :
1
Lastpage :
4
Abstract :
Being confronted with a new demanding communication standard such as 3GPP Long Term Evolution (LTE) supporting up to 150Mbps downlink data rate, baseband architects have to deal with several challenges. New architectures not only have to support data-rates of up to 10 times more than existing radio access technologies (RATs), but also have to provide a high degree of flexibility - flexibility required for system optimizations in the field which by itself is in a stabilization phase. Here, compiler technology and programming support have to be taken into account from the beginning. Beside high performance and flexibility demands, user equipment (Ue) has to meet also an overwriting differentiation criterion, namely, power consumption. Hence, radical new approaches have to be taken to balance this optimization triangle of power consumption, flexibility, and performance.
Keywords :
low-power electronics; power integrated circuits; compiler technology; flexible next generation communication IC; high-speed next generation communication IC; low power next generation communication IC; power consumption; system optimizations; Baseband; Computer architecture; Hardware; Optimization; Program processors; Programming; LTE; MPSoC; MPSoC programming; architecture; baseband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference Dresden (SCD), 2011
Conference_Location :
Dresden
Print_ISBN :
978-1-4577-0431-4
Type :
conf
DOI :
10.1109/SCD.2011.6068725
Filename :
6068725
Link To Document :
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