Automated model complexity reduction using the HICUM hierarchy

Author

Pawlak, A. ; Schröter, M. ; Mukherjee, A. ; Lehmann, S. ; Shou, S. ; Céli, D.

Author_Institution

CEDIC, Dresden Univ. of Technol., Dresden, Germany

fYear

2011

fDate

27-28 Sept. 2011

Firstpage

1

Lastpage

4

Abstract

Many of today´s high-frequency systems are implemented using heterojunction bipolar transistor (HBT) technology. For efficient circuit design, a compact modeling methodology for HBTs providing models with different complexity is of great interest. In particular for simulating larfe-scale circuits a simplified compact model such as HICUM/Level0 is beneficial and attractive. A methodology for generating the parameters for the simplified model from existing HICUM/Level2 parameters is introduced, and accurate modeling results with respect to experimental data over a wide temperature range are demonstrated.

Keywords

heterojunction bipolar transistors; semiconductor device models; HICUM hierarchy; HICUM/Level0; HICUM/Level2; automated model complexity reduction; circuit design; compact modeling; heterojunction bipolar transistor; high-frequency systems; larfe-scale circuits; Adaptation models; Computational modeling; Equations; Integrated circuit modeling; Mathematical model; Temperature dependence; Temperature distribution; HICUM; Heterojunction bipolar transistors; compact modeling; model hierarchy;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference Dresden (SCD), 2011

Conference_Location

Dresden

Print_ISBN

978-1-4577-0431-4

Type

conf

DOI

10.1109/SCD.2011.6068731

Filename

6068731