Modeling and CAE for power electronic topologies

The design of power conditioning circuits is difficult. One difficulty are the parasitic elements if high switching frequencies are desired. This paper shows a general procedure for the design and optimization of these circuits with CAE tools. These tools are physical models for the power semiconductors which are implemented in programs for electronic circuit analysis. But the physical models of the power semiconductors are optimized to achieve on the one hand very short calculation times compared to device models and on the other hand very good accuracy of the switching transients compared to SPICE models. So this CAE tool is an intermediate tool in between the device modeling for the semiconductor on the one hand and the system modeling on the other