DocumentCode
2219265
Title
Memory-based implementation of a Petri net and its application to a programmable controller
Author
Chang, Naehyuck ; Park, Jaehyun ; Koo, Kyeonghoon ; Kwon, Wook Hyun
fYear
1993
fDate
15-19 Nov 1993
Firstpage
613
Abstract
In this paper, a memory-based Petri net implementation is discussed. To realize a memory-based implementation, a sub-class Petri net model is suggested. The suggested model, B-Petri net, is a marked graph whose numbers of input places and output places of a transition are limited to two. The B-Petri net has the same modeling power as a marked graph. The complexity of the B-Petri net is analyzed, and the hardware implementation architecture of a programmable controller based on it is also suggested. The memory tables have realizable memory size, and they are reduced well in case of some real applications like a programmable controller
Keywords
Control system synthesis; Equations; Explosions; Hardware; Logic; Microprocessors; Petri nets; Programmable control; Relays; Software architecture;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics, Control, and Instrumentation, 1993. Proceedings of the IECON '93., International Conference on
Conference_Location
Maui, HI
Print_ISBN
0-7803-0891-3
Type
conf
DOI
10.1109/IECON.1993.339007
Filename
339007
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