DocumentCode :
2219450
Title :
Current signatures [VLSI circuit testing]
Author :
Gattiker, Anne E. ; Maly, Wojciech
Author_Institution :
Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
1996
fDate :
28 Apr-1 May 1996
Firstpage :
112
Lastpage :
117
Abstract :
In this paper we demonstrate that performing IDDQ testing against a single threshold current value does not make sense. In place of the single current threshold we propose the “current signature”. A die´s current signature takes into account the relative measured level of current on all applied IDDQ vectors. Preliminary results of current signature applications are discussed as well
Keywords :
CMOS integrated circuits; VLSI; integrated circuit testing; IDDQ testing; VLSI circuit testing; active defects; current signature; passive defects; Circuit faults; Circuit testing; Current measurement; Performance evaluation; Semiconductor device measurement; Threshold current; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7304-4
Type :
conf
DOI :
10.1109/VTEST.1996.510844
Filename :
510844
Link To Document :
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