• DocumentCode
    2219835
  • Title

    Automatic test generation using genetically-engineered distinguishing sequences

  • Author

    Hsiao, Michael S. ; Rudnick, Elizabeth M. ; Patel, Janak H.

  • Author_Institution
    Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
  • fYear
    1996
  • fDate
    28 Apr-1 May 1996
  • Firstpage
    216
  • Lastpage
    223
  • Abstract
    A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test generation process. A two-phase algorithm is used during test generation. The first phase activates the target fault, and the second phase propagates the fault effects (FE´s) from the flip-flops with assistance from the distinguishing sequences. This strategy improves the propagation of FE´s to the primary outputs, and the overall fault coverage is greatly increased. In our new test generator, DIGATE, genetic algorithms are used to derive both activating and distinguishing sequences during test generation. Our results show very high fault coverages for the ISCAS89 sequential benchmark circuits and several synthesized circuits
  • Keywords
    automatic testing; fault diagnosis; genetic algorithms; logic testing; sequences; sequential circuits; DIGATE; automatic test generation; distinguishing sequence; fault effects; flip-flops; genetic algorithm; sequential circuit; two-phase algorithm; Automatic testing; Benchmark testing; Circuit faults; Circuit synthesis; Circuit testing; Flip-flops; Genetic algorithms; Iron; Sequential analysis; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 1996., Proceedings of 14th
  • Conference_Location
    Princeton, NJ
  • ISSN
    1093-0167
  • Print_ISBN
    0-8186-7304-4
  • Type

    conf

  • DOI
    10.1109/VTEST.1996.510860
  • Filename
    510860