Achieving fanout capabilities in single electron encoded logic networks

In this paper we investigate achieving fanout in single electron encoded logic networks. First, we propose an implementation of a charge amplifier and demonstrate its behavior via simulation. Second, we cascade the proposed charge amplifier with an existing design for a linear threshold gate and demonstrate the behavior of the cascaded blocks via simulation. Third, we demonstrate via simulation that we have achieved fanout capability in a network consisting of basic building blocks in the form of the proposed charge amplifier in cascade with the threshold gate.