DocumentCode
2220529
Title
On the effects of test compaction on defect coverage
Author
Reddy, S.M. ; Pomeranz, Irith ; Kajihara, Seiji
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear
1996
fDate
28 Apr-1 May 1996
Firstpage
430
Lastpage
435
Abstract
We study the effects of test compaction on the defect coverage of test sets for modeled faults. Using a framework proposed earlier, defects are represented by surrogate faults. Within this framework, we show that the defect coverage does not have to be sacrificed by test compaction, if the test set is computed using appropriate test generation objectives. Moreover, two test sets, one compacted and one non-compacted, generated using the same test generation objectives, typically have similar defect coverages, even if the compacted one is significantly smaller than the uncompacted one. Test generation procedures and experimental results to support these claims are presented
Keywords
fault diagnosis; integrated circuit testing; defect coverage; fault modeling; surrogate faults; test compaction; test generation; test sets; Circuit faults; Circuit testing; Cities and towns; Compaction; Delay; Electrical fault detection; Fault detection; Physics computing; Test pattern generators; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1996., Proceedings of 14th
Conference_Location
Princeton, NJ
ISSN
1093-0167
Print_ISBN
0-8186-7304-4
Type
conf
DOI
10.1109/VTEST.1996.510889
Filename
510889
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