DocumentCode
2220861
Title
XMAX: X-tolerant architecture for MAXimal test compression
Author
Mitra, Subhasish ; Kim, Kee Sup
Author_Institution
Intel Corp., Sacramento, CA, USA
fYear
2003
fDate
13-15 Oct. 2003
Firstpage
326
Lastpage
330
Abstract
XMAX is a novel test data compression architecture capable of achieving almost exponential reduction in scan test data volume and test time while allowing use of commercial automatic test pattern generation (ATPG) tools. It tolerates presence of sources of unknown logic values (also referred to as X´s) without compromising test quality and diagnosis capability for most practical purposes. The XMAX architecture has been implemented in several industrial designs.
Keywords
automatic test pattern generation; boundary scan testing; built-in self test; data compression; design for testability; logic design; ATPG; X-tolerant architecture for MAXimal test compression; XMAX architecture; automatic test pattern generation tools; industrial designs; scan test data volume; test quality; Automatic test pattern generation; Automatic testing; Circuit testing; Compaction; Costs; Design for testability; Integrated circuit testing; Manufacturing industries; Pins; Sequential analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-2025-1
Type
conf
DOI
10.1109/ICCD.2003.1240914
Filename
1240914
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