Title :
Hardware co-processors for Real-Time and High-Quality H.264/AVC video coding
Author :
Martina, M. ; Masera, G. ; Fanucci, L. ; Saponara, S.
Author_Institution :
Dipt. Ing. della Inf., Univ. di Pisa, Pisa, Italy
Abstract :
Real-Time and High-Quality video coding is gaining a wide interest in the research community, mainly for entertainment and leisure applications. Furthemore H.264/AVC, the most recent standard for high performance video coding, can be successfully exploited in such a critical scenario. The need for high-quality imposes to sustain up to tens of Mbits/s. To that purpose in this paper optimized architectures for H.264/AVC most critical tasks, Motion Estimation (ME) and Context Aware Binary Arithmetic Coding (CABAC) are proposed. Post synthesis results on a 0.18 μ m standard cells technology show that the proposed architectures can actually process in real time 720×480 video sequences at 30 Hz and grant more than 20Mbits/s in the simplest configuration.
Keywords :
arithmetic codes; coprocessors; image sequences; motion estimation; video coding; CABAC; ME; context aware binary arithmetic coding; frequency 30 Hz; hardware co-processor; high performance video coding; high-quality H.264/AVC video coding; motion estimation; real-time H.264/AVC video coding; video sequences; Abstracts; Coprocessors; Encoding; Periodic structures; Random access memory; Real-time systems; Video coding; H.264/AVC; Hardware architectures; Video coding; entropy coder; motion estimation;
Conference_Titel :
Signal Processing Conference, 2006 14th European
Conference_Location :
Florence