DocumentCode
2221535
Title
Cost-efficient memory architecture design of NAND flash memory embedded systems
Author
Park, Chanik ; Seo, Jaeyu ; Seo, Dongyoung ; Kim, Shinhan ; Kim, Bumsoo
fYear
2003
fDate
13-15 Oct. 2003
Firstpage
474
Lastpage
480
Abstract
NAND flash memory has become an Indispensable component in embedded systems because of its versatile features such as nonvolatility, solid-state reliability, low cost and high density. Even though NAND flash memory gains popularity as data storage, it also can be exploited as code memory for XIP (execute-in-place). We present a cost-efficient memory architecture, which incorporates NAND flash memory into an existing memory hierarchy for code execution. The usefulness of the proposed approach is demonstrated with real embedded workloads on a real hardware prototyping board.
Keywords
NAND circuits; cache storage; embedded systems; flash memories; logic design; memory architecture; memory expansion boards; NAND flash memory; XIP; code memory; cost-efficient memory architecture design; embedded systems; execute-in-place; memory hierarchy; real hardware prototyping board; Costs; Delay; Embedded system; Energy consumption; Flash memory; Hardware; Memory architecture; Random access memory; Read-write memory; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-2025-1
Type
conf
DOI
10.1109/ICCD.2003.1240943
Filename
1240943
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