DocumentCode
2221588
Title
Structural detection of symmetries in Boolean functions
Author
Wang, Guoqiang ; Kuehlmann, Andreas ; Sangiovanni-Vincentelli, Alberto
Author_Institution
California Univ., Berkeley, CA, USA
fYear
2003
fDate
13-15 Oct. 2003
Firstpage
498
Lastpage
503
Abstract
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using special language features such as symmetric data types. Methods for automatically detecting symmetries are based on functional analysis, e.g. using BDDs, or structural methods. The latter search for circuit graph automorphisms which imply functional symmetry. We present a method for finding symmetries of Boolean functions based on a two-step approach. First, the circuit structure is modified to maximize its structural regularity and thus the number of inherent automorphisms. The next step implements a fast algorithm for detecting the automorphism generators of the circuit graph. The generators provide a compact representation of all automorphisms, which in turn encode a subset of the functional symmetries. Because of its pure structural nature, our approach avoids the complexity issues inherent to methods using BDDs, yet it still works automatically and independently from the input specification format. However, the described method may not detect all functional symmetries, however, our experiments demonstrate that it can find the majority of the symmetries present in practical circuits.
Keywords
Boolean functions; binary decision diagrams; computational complexity; graph theory; optimisation; sequential circuits; symmetry; BDD; Boolean functions; circuit graph automorphism generators; circuit structure; fast algorithm; functional symmetry structural detection; input specification format; manual specification; symmetric data types; Automatic test pattern generation; Automatic testing; Binary decision diagrams; Boolean functions; Circuit synthesis; Data structures; Delay; Energy consumption; Functional analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2003. Proceedings. 21st International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-2025-1
Type
conf
DOI
10.1109/ICCD.2003.1240946
Filename
1240946
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