An importance sampling for the coded satellite systems with memory

For the estimation of average bit error rate (BER) of complex digital communication systems, Monte-Carlo (MC) simulation technique has been widely used because of its simplicity. However, it requires excessively long execution time to estimate lower BER. Although this time can substantially be reduced by using importance sampling (IS), IS has not been quite successful in the simulation of practical nonlinear satellite communication systems that typically consist of memory components and forward error correction (FEC) scheme. In this paper, we propose a new algorithm for the simulation of Viterbi decoder using sequentially implemented IS. We then combine it with the efficient importance sampling (EIS) technique to resolve the problems associated with memory. Results from this integration exhibit dramatic reduction of simulation time. Principles of the new simulation method of Viterbi decoding are presented. Details on the integration with EIS are followed with some numerical examples