Implementation of H.324 audiovisual codec for mobile computing

Author

Fujita, Gen ; Okuhata, Hiroyuki ; Miki, Moran H. ; Onoye, Takao ; Shirakawa, I.

Author_Institution

Dept. of Inf. Syst. Eng., Osaka Univ., Japan

fYear

1998

fDate

11-14 May 1998

Firstpage

193

Lastpage

196

Abstract

A VLSI implementation of the H.324 audiovisual codec is described. A number of sophisticated low-power architectures have been devised dedicatedly for the mobile use. A set of specific functional units, each corresponding to a process of H.263 video codec, is employed to lighten different performance bottlenecks. A compact DSP core composed of two MAC units is used for both ACELP and MP-MLQ coding schemes of the G.723.1 speech codec. The proposed audiovisual codec core has been implemented by using 0.35 μm CMOS 4LM technology, which contains totally 420 k transistors with a dissipation of 224.32 mW from single 3.3 V supply

Keywords

CMOS digital integrated circuits; VLSI; codecs; low-power electronics; mobile computing; 0.35 micron; 224.32 mW; 3.3 V; ACELP; CMOS 4LM technology; DSP core; H.324 audiovisual codec; MAC units; MP-MLQ coding schemes; VLSI implementation; low-power architectures; mobile computing; specific functional units; Bit rate; Clocks; Digital signal processing; Energy consumption; Frequency; Mobile computing; Phase change materials; Speech codecs; Very large scale integration; Video codecs;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-4292-5

Type

conf

DOI

10.1109/CICC.1998.694961

Filename

694961