• DocumentCode
    2224561
  • Title

    Behavioral modeling of electronic circuit module with Verilog-A language

  • Author

    Xinquan, Lai ; Yue, Zhang ; Yushan, Li ; Xuemei, Liu

  • Author_Institution
    Inst. of Electron. CAD, Xidian Univ., Xi´´an, China
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    155
  • Lastpage
    158
  • Abstract
    Modeling of analog ICs and mixed ICs is key to the development of EDA of mixed ICs, and is a bottle-neck in the automation of design and manufacture of analog ICs. This paper attempts to model analog and mixed electronic systems with Verilog-A language, which will direct the automated design of analog and mixed ICs
  • Keywords
    analogue integrated circuits; computer integrated manufacturing; hardware description languages; integrated circuit modelling; mixed analogue-digital integrated circuits; EDA; Verilog-A language; analog IC; analog electronic systems; automated design; automatization design; automatization manufacture; behavioral modeling; electronic circuit module; mixed IC; mixed electronic systems; modeling; Accidents; Analog integrated circuits; Circuit simulation; Delay; Electronic circuits; Hardware design languages; Integrated circuit modeling; Phase locked loops; SPICE; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2001. Proceedings. 4th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-6677-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2001.982520
  • Filename
    982520