• DocumentCode
    2225449
  • Title

    Study and design of a 16-bit oversampling Σ-Δ A/D converter

  • Author

    Jun, Cheng ; Wei, Liu ; Lingyun, Zhang ; Guican, Chen

  • Author_Institution
    Inst. of Microelectron., Xi´´an Jiaotong Univ., China
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    307
  • Lastpage
    309
  • Abstract
    A 16-bit oversampling Σ - Δ A/D converter is presented. The modulator in the converter is implemented by using 4-order structure; the digital decimation filters are realized with two stage filters: the combed filter and half-band filter. The modulator with 16-bit resolution is achieved in this A/D converter at a oversampling rate of 64
  • Keywords
    comb filters; digital filters; sigma-delta modulation; 16 bit; 4-order modulator; comb filter; digital decimation filter; half-band filter; oversampling sigma-delta A/D converter; two-stage filter; Clocks; Digital filters; Digital modulation; Dynamic range; Equations; Frequency; Microelectronics; Signal resolution; Statistics; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2001. Proceedings. 4th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-6677-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2001.982560
  • Filename
    982560