System-on-a-chip architecture for W-CDMA baseband modem LSI

A system-on-a-chip architecture dedicated to a W-CDMA (Wideband Code Division Multiple Access) baseband modem LSI is described, with the main theme focused on the cell searcher and PIL (Prime InterLeaver) modules. First, the next generation wireless communication system based on W-CDMA is briefly overviewed. Then, a novel VLSI architecture is proposed mainly for the cell searcher and PIL modules, in which a search algorithm is refined for the cell searcher to minimize the circuit size, maintaining the operating throughput, and a time-shared scheme is adopted for the Turbo encoding/decoding, aiming at the maximization of the hardware sharing in the encoding/decoding process. Finally, implementation results are shown to demonstrate that the proposed architecture can contribute much toward the practical low-power implementation of a W-CDMA baseband modem LSI