DocumentCode :
2225953
Title :
Implementation of MPEG-2 transport stream remultiplexer with CPLD
Author :
Xingdong, Wang ; Songyu, Yu ; Wei, Ye
Author_Institution :
Inst. of Image Commun. & Inf. Process., Shanghai Jiao Tong Univ., China
fYear :
2001
fDate :
2001
Firstpage :
390
Lastpage :
392
Abstract :
Design of transport stream (TS) remultiplexer with CPLD is described in this paper. PID mapping and PCR correction are two important functions of TS remultiplexer. For saving resource, simple RAM architecture is substituted by the combination of content-addressable-memory (CAM) and RAM, when forming a high-speed PID information table. An uncomplex algorithm of PCR correction is given in this paper. Experiment result show that the jitter can be reduced to less than 74 ns
Keywords :
content-addressable storage; image coding; jitter; multiplexing equipment; programmable logic devices; random-access storage; telecommunication standards; CPLD; MPEG-2 transport stream remultiplexer; PCR correction; PID mapping; RAM architecture; content addressable memory; jitter; CADCAM; Clocks; Computer aided manufacturing; Digital video broadcasting; HDTV; Logic devices; Multimedia communication; Programmable logic devices; Streaming media; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
Type :
conf
DOI :
10.1109/ICASIC.2001.982582
Filename :
982582
Link To Document :
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