DocumentCode
2226090
Title
An architecture and implementation of image scaling conversion
Author
Tao, Feng ; Wen-Lu, Xie ; Yang Lian-Xing
Author_Institution
ASIC, Fudan Univ., Shanghai, China
fYear
2001
fDate
2001
Firstpage
409
Lastpage
410
Abstract
Cubic and bisigmoidal interpolation methods are used for image scaling to improve the video quality. We have developed an efficient architecture with the hardware complexity reduced. The system is implemented and verified by the FPGA-based evaluation board
Keywords
VLSI; field programmable gate arrays; interpolation; video signal processing; FPGA evaluation board; VLSI architecture; bisigmoidal interpolation; cubic interpolation; hardware complexity; image scaling conversion; video format conversion; Application specific integrated circuits; Circuit testing; Finite impulse response filter; Hardware; Image converters; Interpolation; Logic arrays; Switches; System testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982587
Filename
982587
Link To Document