DocumentCode
2226572
Title
A novel configurable analog unit architecture
Author
Guo, Binlin ; Zhou, Feng ; Tong, Jiarong
Author_Institution
Microelectron. Dept., Fudan Univ., Shanghai, China
fYear
2001
fDate
2001
Firstpage
478
Lastpage
481
Abstract
In this paper, a new architecture of configurable analog unit based on switch capacitor technology is presented. The architecture consists of four parts of input expansion, SC building block, self-calibrating OpAmp and clock control. The architecture not only achieves linear analog application such as integrator, gain amplifier, filter, etc., but also can be expediently configured to implementing some nonlinear analog applications. A programming mechanism using two programmable selector for parameter selector and function selector are illustrated for the architecture. The architecture is propitious to utilize configuration and technology mapping. As nonlinear analog application, a voltage control oscillator is implemented. Simulation result with HSPICE shows that for 0.6 μ CMOS process, the relative error of voltage-frequency is less than 0.2%
Keywords
CMOS analogue integrated circuits; SPICE; analogue processing circuits; programmable circuits; switched capacitor networks; voltage-controlled oscillators; 0.6 micron; CMOS chip; HSPICE simulation; configurable analog unit architecture; field programmable analog array; linear function; nonlinear function; programming mechanism; switched capacitor technology; technology mapping; voltage control oscillator; CMOS process; CMOS technology; Capacitors; Clocks; Field programmable analog arrays; Field programmable gate arrays; Functional programming; Logic; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982604
Filename
982604
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