DocumentCode
2226613
Title
Experimental verification of the principle of operation of building blocks of 0.6 volt Si and SiGe vertical dual carrier field effect transistor FPGA with effective channel length of 5-20 nm
Author
Xu, Y.Z. ; Chen, L. ; Tang, Z.M. ; Li, Z.S. ; Wu, C.L. ; Li, Y.B. ; Li, G.H. ; Yan, F.Z. ; Zou, D.S. ; Xu, P. ; Huang, D.H. ; Yang, Y.H. ; Huang, C.
Author_Institution
Beijing Inst. of Microelectron., China
fYear
2001
fDate
2001
Firstpage
482
Lastpage
485
Abstract
The principle of operation of building blocks of 0.6 V Si and SiGe Vertical Dual Carrier Field Effect Transistor FPGA with effective channel length of 5-20 nm is reviewed. Measured data on the experimental verification of the principle of operation are presented
Keywords
Ge-Si alloys; MOSFET circuits; field programmable gate arrays; low-power electronics; silicon; 0.6 V; 5 to 20 nm; Si; Si vertical DCFET FPGA; SiGe; SiGe vertical DCFET FPGA; VDCFET static memory cells; effective channel length; principle of operation; vertical dual carrier field effect transistor; Computers; FETs; Field programmable gate arrays; Germanium silicon alloys; Microelectronics; Propagation delay; Resistors; Silicon germanium; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982605
Filename
982605
Link To Document