MPEG-2 TS generate system and its implementation with FPGA

In this paper, a MPEG-2 TS (transport stream) generation system is introduced. It can work as a TS generator source to provide a TS from hard disk in a cycling mode; it can also work as a TS recorder to receive a TS from a peripheral. A real-time PID filter, PID changing and bit rate changing are also realized in this system; Further the received TS can be analyzed and processed by a PC. In this paper, we briefly introduce the TS generate system´s hardware architecture and working process. The system consists of a PCI interface card and a PC. The PCI interface card is implemented mainly with one FPGA (APEX 20K200 E). The system takes full advantage of the APEX20K´s features of high integrity and flexibility that most functions are realized within one FPGA