• DocumentCode
    2227373
  • Title

    A new faster sequence pair algorithm [circuit layout]

  • Author

    Lin, C. ; Leenaerts, D.M.W.

  • Author_Institution
    Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
  • Volume
    3
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    407
  • Abstract
    This paper introduces a new sequence pair algorithm which has a complexity lower than O(M1.25), which is a significant improvement compared to the original O(M2) algorithm. Furthermore, the new algorithm has complexity close to the theoretical lower bound. Experimental results, obtained with a straightforward implementation, confirm this improvement in complexity
  • Keywords
    VLSI; circuit layout CAD; computational complexity; integrated circuit layout; printed circuit layout; PCB layout; VLSI layout; chip area computation; circuit layout; complexity reduction; direct view algorithm; floorplanning; placement; sequence pair algorithm; theoretical lower bound; Computational modeling; Data structures; NP-hard problem; Routing; Shape; Simulated annealing; Stochastic processes; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
  • Conference_Location
    Geneva
  • Print_ISBN
    0-7803-5482-6
  • Type

    conf

  • DOI
    10.1109/ISCAS.2000.856083
  • Filename
    856083
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2227373