An analytical linearization method for CMOS MMIC power amplifier using Multiple Gated Transistors

Author

Weng, Sin Sai ; Chong, Lai Keng ; Vai, Chiang Kuok ; Wa, Choi Wai ; Tam, K.W. ; Martins, R.P.

Author_Institution

Fac. of Sci. & Technol., Univ. of Macau, Macau

fYear

2001

fDate

2001

Firstpage

670

Lastpage

672

Abstract

A novel analytical linearization method for CMOS MMIC power amplifiers based on parallel connection of transistors (also called Multiple Gated Transistors) is proposed. By this method, the power amplifier\´s IMD₃ can be eliminated analytically by operating the transistors within the determined g_m" linearized range. In order to demonstrate the usefulness of the proposed method, a 900 MHz Class AB power amplifier using 4 NMOS transistors with maximum aspect ratio (W/L)=1300/0.5 is designed based on a 0.35 μm CMOS process. The simulation results demonstrate that -76 dB IMD₃ can be obtained with 13 dB power gain

Keywords

CMOS analogue integrated circuits; MMIC power amplifiers; UHF integrated circuits; UHF power amplifiers; circuit simulation; field effect MMIC; intermodulation distortion; linearisation techniques; nonlinear network analysis; 0.35 micron; 13 dB; 900 MHz; 900 MHz class AB power amplifier; CMOS MMIC power amplifier; NMOS transistors; analytical linearization method; maximum aspect ratio; multiple gated transistors; parallel transistor connection; power amplifier IMD₃; power gain; simulation results; transconductance linearized range; CMOS process; CMOS technology; Linearization techniques; MMICs; MOSFET circuits; Narrowband; Power amplifiers; Power harmonic filters; Silicon compounds; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2001. Proceedings. 4th International Conference on

Conference_Location

Shanghai

Print_ISBN

0-7803-6677-8

Type

conf

DOI

10.1109/ICASIC.2001.982652

Filename

982652