DocumentCode
2228432
Title
IP reusable design methodology
Author
Qi, Han ; Jiang, Zheng ; Wei, Jia
Author_Institution
Motorola Electron. Ltd., Suzhou, China
fYear
2001
fDate
2001
Firstpage
756
Lastpage
759
Abstract
The rapid increase in IC design complexity and greater time-to-market pressure require improving design productivity and reducing product cycle time and development cost, therefore it is necessary to reuse complex pre-defined design and blocks develop new SOC design methodology to improve design productivity. In this paper, IP reusable design methodology is studied from module level and system level. Interface-based IP design methodology is studied firstly. According to the IP interface standards of Motorola Semiconductor Reuse Standards (MSRS), IP module standalone verification environment is built. Next, SOC system design methodology is analyzed and platform-based design methodology is studied from two sides: the development of integration platform and the SOC development based on integration platform. At last, the Mcore-based platform developed by Motorola is introduced as an example
Keywords
circuit CAD; industrial property; integrated circuit design; IC design; IP interface standard; IP module standalone verification environment; IP reusable design methodology; Mcore; Motorola Semiconductor Reuse Standards; SOC integration platform; design productivity; interface-based module design; platform-based system design; product cycle time; product development cost; Communication standards; Computer architecture; Computer interfaces; Costs; Design methodology; Productivity; Protocols; System buses; System-on-a-chip; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6677-8
Type
conf
DOI
10.1109/ICASIC.2001.982673
Filename
982673
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