Title :
High efficient energy recovery logic for adiabatic computing
Author :
Hongyu, Dai ; Runde, Zhou ; Yuanqing, Ge
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
In this paper a new adiabatic logic circuit (HEERL) is proposed, which avoids internal node charge waste and has higher energy recovery efficiency compared to other quasi-adiabatic circuits. Confirmed by the simulation results of Hspice, the HEERL circuit consumes less energy and has very high operating frequency (up to 400 MHz). A 4-stage HEERL inverter chain is also designed and simulated to demonstrate the cascading capability of the logic
Keywords :
SPICE; integrated logic circuits; logic gates; low-power electronics; 400 MHz; HEERL inverter; HSPICE simulation; adiabatic computing; cascading capability; high efficient energy recovery logic; low power design; quasi-adiabatic logic circuit; CMOS digital integrated circuits; Circuit simulation; Clocks; Computational modeling; Digital circuits; Energy consumption; Logic circuits; Pulse inverters; Switches; Voltage;
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
DOI :
10.1109/ICASIC.2001.982699
