DocumentCode

2229717

Title

The 1:3 phased demultiplexer circuit

Author

Poriazis, SeraJim

Author_Institution

Phasetronic Laboratories

fYear

2004

fDate

5-7 Sept. 2004

Firstpage

495

Lastpage

498

Keywords

Circuit analysis; Circuit simulation; Circuit synthesis; Clocks; Demultiplexing; Frequency; HEMTs; Latches; SONET; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical, Electronic and Computer Engineering, 2004. ICEEC '04. 2004 International Conference on

Print_ISBN

0-7803-8575-6

Type

conf

DOI

10.1109/ICEEC.2004.1374510

Filename

1374510