DocumentCode :
2229828
Title :
High-order cascade multibit ΣΔ modulators for xDSL applications
Author :
Río, R. Del ; Medeiro, E. ; Pérez-Verdu, B. ; Rodriguez-Vazquez, Angel
Author_Institution :
Inst. de Microelectron., CNM-CSIC, Seville, Spain
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
37
Abstract :
This paper explores the use of ΣΔ modulators for A/D conversion in xDSL applications. Two high-order multibit architectures, the 2-1-1mb modulator and a novel 2-1-1-1mb cascade (MASH), are proposed to achieve 14 bit dynamic range@4.4 MS/s using low oversampling ratio. They show very low sensitivity to the internal DAC linearity error, with no calibration required. Simulations show this performance can be achieved in presence of circuit imperfections, using submicron digital CMOS processes
Keywords :
CMOS integrated circuits; cascade networks; digital subscriber lines; modulators; sigma-delta modulation; 14 bit; 2-1-1mb modulator; A/D conversion; ADC; MASH type; high-order cascade ΣΔ modulators; high-order multibit architecture; internal DAC linearity error; multibit ΣΔ modulators; oversampling ratio; sigma-delta modulators; submicron digital CMOS processes; xDSL applications; CADCAM; CMOS process; Calibration; Cams; Circuits; Computer aided manufacturing; Delta modulation; Dynamic range; Linearity; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
Type :
conf
DOI :
10.1109/ISCAS.2000.856252
Filename :
856252
Link To Document :
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