Title :
The reliability issues on ASIC/memory integration by SiP (system-in-package) technology
Author :
Song, YongHa ; Kim, SoonGon ; Rhee, KwangJoon ; Cho, DongSoo ; Kim, TaekSoo
Author_Institution :
Syst. LSI Div., SAMSUNG Electron. Co. Ltd, Kyunggi-Do, South Korea
Abstract :
When integrating more than one chip in a package using so-called SiP (system-in-package) technology, the size reduction rate is approximately 30∼60% compared to the identical PCB (printed circuit board). In this paper, we review the advantages of using SiP first, and then some of the reliability issues are discussed, including leakage current, test, EMI (electromagnetic interference), EOS (electrical over stress) and latch-up, related to using SiP. Solutions to these reliabilities are proposed in this paper.
Keywords :
application specific integrated circuits; electromagnetic interference; electrostatic discharge; integrated circuit packaging; integrated circuit reliability; integrated memory circuits; leakage currents; multichip modules; ASIC/memory integration; EMI; EOS; MCP technology; PCB; SiP technology; SiP test; electrical over stress; electromagnetic interference; latch-up; leakage current; multi-chip package; reliability; size reduction; system-in-package; Application specific integrated circuits; Bonding; Earth Observing System; Energy consumption; Integrated circuit reliability; Large scale integration; Leakage current; Packaging; Routing; SDRAM;
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
DOI :
10.1109/SOC.2003.1241451
