Title :
A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications
Author :
Hutter, Andreas ; Giebel, G. ; Stechele, Walter
Author_Institution :
Corp. Technol., Siemens AG, Munich, Germany
Abstract :
This paper describes a new VLSI coprocessor architecture implementing the MPEG-4 visual core profile for advanced mobile multimedia terminals and applications. An analysis of the algorithmic requirements and of the constraints in the mobile multimedia applications field leads to an architectural approach based on a RISC core processor and programmable yet specialized coprocessors. We focus on one coprocessor called MacroBlockEngine which supports the tools for the texture processing part in the coding algorithm. The architecture of the MacroBlockEngine is presented in detail and experimental results from the simulations and from the hardware synthesis are given
Keywords :
VLSI; coprocessors; data compression; image texture; mobile communication; multimedia communication; reduced instruction set computing; telecommunication terminals; video coding; MPEG-4 visual core profile; MacroBlockEngine; RISC core processor; VLSI; algorithmic requirements; coding algorithm; coprocessor architecture; hardware synthesis; mobile multimedia applications; mobile multimedia terminals; texture processing; Application software; Coprocessors; Digital multimedia broadcasting; IEC standards; ISO standards; Layout; MPEG 4 Standard; Shape; Transform coding; Video compression;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.856287
