DocumentCode :
2231003
Title :
DOMINO noise model: a new crosstalk noise model for dynamic logic circuits
Author :
Choi, Seung Hoon ; Roy, Kaushik
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear :
2003
fDate :
17-20 Sept. 2003
Firstpage :
207
Lastpage :
210
Abstract :
DOMINO gates are more vulnerable to crosstalk-induced functional failures compared to static CMOS gates. Previously developed noise models generate a pessimistic noise analysis because the effect of the keeper in DOMINO is not properly incorporated. In this paper, a new crosstalk noise model is proposed for DOMINO logic gates. Our noise model takes the effect of the keeper into account and provides a more accurate noise measure. We define the degree of conservatism for noise models and show that our noise model dramatically reduces the pessimism.
Keywords :
integrated circuit modelling; integrated circuit noise; integrated logic circuits; interference (signal); logic simulation; DOMINO gates; DOMINO keeper effect; DOMINO logic noise model; crosstalk noise model; crosstalk-induced functional failures; dynamic logic circuits; noise analysis; Capacitance; Circuit noise; Circuit simulation; Coupling circuits; Crosstalk; Delay; Integrated circuit interconnections; Logic circuits; Noise figure; Noise reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
Type :
conf
DOI :
10.1109/SOC.2003.1241494
Filename :
1241494
Link To Document :
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