Title :
Novel digital calibration architecture and implementation based on DNL/INL trade-off for high performance D/A conversion
Author_Institution :
Intel Corp., Chandler, AZ, USA
Abstract :
This paper introduces a novel fully digital D/A converter linearity calibration scheme based on a DNL and INL tradeoff (DIT) principle. Both analytical and statistical simulation results show a few bits of D/A converter linearity improvement by such a technique.
Keywords :
calibration; digital-analogue conversion; linearisation techniques; network synthesis; D/A converter linearity calibration; DIT calibration circuit; DNL/INL trade-off; converter linearity improvement; digital calibration architecture; high performance D/A conversion; Analytical models; Calibration; Circuits; Degradation; Linearity; Sampling methods; Statistical analysis; Very large scale integration;
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
DOI :
10.1109/SOC.2003.1241504
