Pulse modulation circuit architecture and its application to functional image sensors

Analog-digital merged circuit architecture using pulse modulation signals and its application to functional image sensors with parallel focal plane processing are reported. The architecture is based on switched current integration and time domain charge-to-pulse conversion techniques. Parallel analog calculations such as add_{and multiply} add are realized with low supply voltage and low power dissipation utilizing deep-sub μm CMOS technologies. A functional CMOS image sensor which realizes parallel PWM readout, block averaging for gray scale image data, and simple pattern detection, and calculations for x- and y-projections and centers of gravity of binary image data, is proposed. A functional image sensor test chip with 56×56 pixels was fabricated in a 6 mm×6 mm chip with a 0.8 μm CMOS technology is described