Title :
3-D placement considering vertical interconnects
Author :
Kaya, Idris ; Olbrich, Markus ; Barke, Erich
Author_Institution :
Inst. of Microelectron. Syst., Hannover Univ., Germany
Abstract :
3D integration is going to play an important role in the future. Increasing complexity and increasing impact of interconnects to integrated circuit (IC) performance makes 3D more and more attractive. EDA tools for 3D design hardly exist. We propose a new 3D standard-cell placer based on quadratic programming. It ensures a reduction of the total wirelength and can deal with standard cells and vertical interconnects simultaneously. The final result is a legalized, design rule compliant and discrete 3D placement.
Keywords :
integrated circuit interconnections; integrated circuit layout; quadratic programming; 3D EDA tools; 3D placement; design rule compliant placement; discrete 3D placement; legalized 3D placement; quadratic programming; standard-cell placer; total wirelength reduction; vertical interconnects; CMOS technology; Delay; Electronic design automation and methodology; Integrated circuit interconnections; Microelectronics; Nonlinear equations; Routing; Vectors; Very large scale integration;
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
DOI :
10.1109/SOC.2003.1241509
