Title :
Methods for efficient use of Lagrangian relaxation for SOC soft-module floorplanning
Author :
Wang, Benyi ; Chrzanowska-Jeske, Malgorzata ; Jeske, Marcin
Author_Institution :
Dept. of Electr. & Comput. Eng., Portland State Univ., OR, USA
Abstract :
In this paper, we present new methods to improve the performance of sequence-pair-based floorplanning algorithms for SOCs (system-on-chip) and microprocessors. Edge pruning and more accurate initial value settings significantly reduce CPU time for soft-module floorplanning of large numbers of modules using Lagrangian relaxation (LR). A floor planner, ELF-SP, which implements these methods, runs faster than published approaches, and produces better or comparable floorplans.
Keywords :
evolutionary computation; integrated circuit layout; microprocessor chips; system-on-chip; ELF-SP floorplanner; Lagrangian relaxation; SOC soft-module floorplanning; edge pruning; evolutionary algorithm-based floorplanner; initial value settings accuracy; microprocessors; sequence-pair-based floorplanning algorithms; system-on-chip; Algorithm design and analysis; Approximation algorithms; IEL; Lagrangian functions; Mesh generation; Microprocessors; Space technology; System-on-a-chip; Timing; Wire;
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
DOI :
10.1109/SOC.2003.1241527
